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World’s lowest power multi-gigabit wireless chip from Panasonic



/ 5 years ago

Panasonic today announced it has developed a chipset for multi-gigabit millimeter wave wireless communication that offers the industry’s lowest power consumption of less than 1 Watt by employing a new baseband processing architecture. The new chipset will enable stable interactive communication between various kinds of devices supporting the specification developed by the WiGig Alliance. Panasonic had previously developed fundamental CMOS circuit technologies for 60 GHz transceiver and modem signal processing circuits, but now an additional radio packet processing block has been integrated as a key block of the chipset. This plays a significant role in accelerating the realization of simple to use high-definition video data sharing/streaming applications for mobile devices.

This chipset can be embedded into mobile devices, such as smartphones, which require less than 1-Watt power consumption. This technology enables the transfer a 30 minute-long compressed high-definition video content to mobile devices within 10 seconds. It also allows the streaming of latency-free high-definition video (for example, instant high-definition display updates in response to user controls on mobile devices) directly from a mobile device onto a big screen TV with real-time performance that surpasses any of the existing technologies today.
This chipset has the following features:

  • This newly developed chipset consists of a 60 GHz transceiver LSI, and a baseband processing LSI with Media Access Control (MAC) packet processing capability. Even when operating at a high data rate of 2.5 Gigabits per second, this chipset is capable of achieving less than 1-Watt of power consumption.
  • Transceiver LSI size is reduced by more than 50%, compared to the transceiver LSI Panasonic developed earlier, while supporting 9 GHz bandwidth which is allocated as unlicensed spectrum in Japan and Europe in the 60 GHz frequency band.

The chipset is realized by adopting the following new technologies:

  • Low power consumption MAC packet processing technology that employs optimum control between general-purpose processor and additional high-speed control circuits to keep processor clock frequency low, thereby achieving less than 1-Watt power consumption performance.
  • New high accuracy coil-shaped circuit topology that overcomes the limitation of transistor separation distance requirements for 60 GHz carrier frequency, thereby achieving chip size reduction.

Source: PR