Intel Scalable Xeon Mesh Launch Slides Leaked
Samuel Wan / 12 months ago
In a few short hours, Intel is set to release their latest iteration of Xeon processors. Starting with Skylake-SP, the chip giant is moving to a new multi-core paradigm. Intel is calling the new design Mesh. Mesh has the entire multi-core architecture revamped to enhance flexibility. In many ways, this is Intel’s response to AMD’s new EPYC processors. The processors replace the aging Broadwell Xeon platform with up to 28 cores and 56 threads. Just ahead of launch, the slides have been leaked.
First up, the processors use the “new” Skylake architecture. Intel is claiming a 10% IPC boost compared to Broadwell but that is tad optimistic given real word testing. In addition to the host of regular Skylake optimisations, Intel is throwing in AVX 512 with 2 FMA per core. This should double floating point performance in the most optimal scenario. AVX 512 will be a Skylake-SP exclusive until Cannon Lake at the earliest.
Mesh is Intel’s New ‘Ring Bus’
The real hero of the show is the new Mesh architecture. This is the system Intel is using to connect all 28 cores in Skylake SP. With Broadwell-EX, Intel connected each core to a ring bus which facilitated inter-core communication. Depending on the specific cores, the ring bus could act as the bottleneck and larger cores required two ring busses. With Mesh, each logic block is connected using several interconnects multiple units. Due to the extra connections, Intel is likely able to improve inter-core communication. Another improvement is that the CPU can scale easier as adding a new core is as simple as plugging in a few interconnects.
As a result of the new design, both Skylake SP and EPYC share a similar interconnect architecture. It looks a like a more distributed network is the way to go. The key difference is that while AMD’s Infinity Fabric connects several modules together, Mesh connects each CPU together. It will be interesting to see how these differences play out in real world multi-core efficiency. One thing I hope to happen is cheaper CPUs since scalability should reduce costs.