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Samsung Develops Next-Gen NAND That Could Cut Energy Use by 96%

Samsung Develops Next-Gen NAND That Could Cut Energy Use by 96%

Researchers from the Samsung Advanced Institute of Technology (SAIT) have published a study discussing the future of solid-state drives (SSD) using Ferroelectric Field-Effect Transistors (FeFETs).

Breakthrough in Energy-Efficient NAND Flash

Samsung Develops Next-Gen NAND That Could Cut Energy Use by 96%

Samsung’s team has developed an experimental NAND flash memory design that could reduce energy consumption by up to 96% in future generations.

This advancement, published in the journal Nature (thanks Tom’s Hardware), focuses on the use of Ferroelectric Field-Effect Transistors (FeFETs).

The research aims to address one of the biggest problems in current NAND architectures: the high pass voltage (Vpass).

In a traditional design, a high voltage must be applied to the vertical word lines each time a cell is read or programmed. As the industry moves toward more 3D layers (beyond 200), this voltage overhead increases, consuming a significant amount of total NAND memory power.

FeFET Design: Reducing Power and Increasing Efficiency

Samsung proposes a design with an almost zero pass voltage. The FeFET structure uses hafnium-based ferroelectric material, which allows the maximum threshold voltage to drop below zero.

This enables multi-level cell operation (such as QLC or even five bits per cell) efficiently—without the high Vpass that traditional NAND needs to prevent interference.

Simulations show the enormous potential for energy savings. Researchers estimate that a 286-layer module using this FeFET architecture could cut combined program and read energy by about 94%.

In a hypothetical 1,024-layer design, energy consumption could drop by more than 96%, which would greatly improve the efficiency of data centers and mobile devices.

Still in the Research Stage

It’s important to note that this work is still in the research phase, not a product announcement.

Although FeFETs show a wide memory window, the authors explain that further development is needed to improve endurance and cycle limits.

They also plan to study oxide channel behavior under high-temperature stress before this design can be implemented in future Samsung storage drives.

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