Soft Machines Reveals Proof of Concept VISC CPU
Samuel Wan / 3 years ago
Ever since Soft Machines first revealed their plans for a VISC style processor, many CPU fans have grown interested in what is essentially “reverse Hyper-Threading”. Today the CPU design house revealed their proof of concept chip along with a number of key design details. With VISC, Soft Machines is hoping to take the computing world by storm, reinvigorating growth in single threaded IPC and power/watt.
VISC work by creating virtual cores and virtual threads to run on top of the physical cores. Basically, the CPU would have a middle layer that would translate the incoming operation from the OS into the CPU language and run them on a virtual core. The key to the performance gains is that even in a single-threaded workload, VISC will still be able to dynamically assign the tasks to a single virtual core made up of various hardware cores.
Take for instance a dual core CPU that has 1 256bit FPU. The OS assigns a take to run 2 256bit floating operations in a single thread. In a normal CPU, the tasks would run concurrently, with 1 256bit instruction being processed per clock. Under VISC though, the CPU would be able to assign 1 operation to each core’s FPU, independent of what the OS is asking, allowing for the entire operation to be completing a single cycle. Power savings are also to be had as instead of having to run a single core at say 2Ghz, two cores can clock lower at say 1GHz and still complete the operation in the same amount of time.
This is, of course, a best case scenario as there may be workloads where the second operation is dependent on the result from the first, leading no gains at all. Even with all the caveats, SoftMachines will allow a quad-core CPU for instance, to turn into a single monster core to boost single-threaded operations. Ironically, it seems that VISC would work best with workloads that can be multithreaded but aren’t due to developer laziness.
While the proof of concept CPU is out, it’s still quite limited, with only 32bit support and 2 cores. Next year, the commercially released Shasta is expected to arrive with support for 64bit and up to 4 cores. In long run, Soft Machines is hoping for partners to use their IP to design their chips and commercialize the product. If the designs do take hold and live up to their claims, it could really spice up the CPU market. You can find the rest of the Soft Machines presentation here.