Intel Kaby Lake-G Processors May Feature Discrete GPU with HBM2



/ 2 years ago

Kaby Lake-G Intel

Last year, some interesting rumours came out about Intel licencing AMD graphics IP. While there was a possibility, it was never seriously considered as Intel has plenty of in-house GPU technology to use. According to the new series of leaked slides, it appears that they were, in fact, some credence to those rumours. The company is reportedly working on a new series of Kaby-Lake G processors with a supersized iGPU.

The leaked slides purport to show off Kaby Lake-G which takes the Intel iGPU to the next level. Doing away with the usual integrated design, KBL-G opts for a MCM design with multiple dies to accommodate the graphics portion. Even more astounding is the fact that instead of the usual expensive eDRAM cache, HBM2 will be used just like with AMD’s Fiji GPUs.

This new design fits in with Intel’s new Heterogenous design principles. Instead of building a single chip on 10nm or the latest process nodes, Intel will use a MCM package to mix and match cost effective nodes. After all, there may be little savings with moving a to a new node for the I/O portion and having smaller chips will help with yields for the harder to reach processes.

In order to integrate all the parts into the MCM package, Intel has opted to not use the unified interposer with expensive TSV (Through-Silicon Vias). Instead, the company will use their new EMIB interconnect technology with small interposers connecting the discrete elements together. This allows for a massive 58.5 x 31mm package to be reasonably cost effective.

With all the interposer and HBM2, this is where the AMD IP might come in. HBM2 and interposers were first used on a large scale by AMD they may undoubtedly may have some patents. At this point, it is still too early to see what graphics IP Intel will use but the slide does suggest the in-house GT2. Either way, we may end up in an interesting position where Intel brings HBM2 and interposers to the CPU space before AMD’s APUs despite coming up with HBM2 and interposers first.

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